Beyond Resolution: Recent Progress and Industrial Challenges of Nanoimprint Lithography for Advanced Semiconductor Manufacturing

Abstract

The relentless downscaling of semiconductor devices has pushed conventional lithography toward both economic and physical limits. Deep Ultraviolet (DUV) lithography with multi-patterning schemes causes exponential cost escalation, while Extreme Ultraviolet (EUV) lithography imposes prohibitive capital investment exceeding US$150 million per scanner and megawatt-scale power consumption. Within this landscape, nanoimprint lithography (NIL) has re-emerged as a compelling complementary patterning technology. Unlike projection-based methods, NIL achieves pattern definition through mechanical contact and material displacement. Therefore, rendering it bypasses optical diffraction limits and stochastic effects caused by photo-shot noise. This review provides a systematic evaluation of the transition of NIL from laboratory demonstration to semiconductor high-volume manufacturing (HVM), with emphasis on progress made during 2023-2025. We highlight the paradigm shift from resolution-centric studies to manufacturing-driven metrics including overlay accuracy, defect density, throughput, template lifetime, residual layer uniformity, and cost of ownership. We then examine recent advances across six key technology modules: tool architecture, overlay improvement, defect suppression, template ecosystems, resist engineering, and application-specific integration. We argue that NIL is positioned as a high-value strategic complement targeting specific layers in DRAM, 3D NAND, and advanced packaging, where sub-10 nm resolution, three-dimensional patterning capability, and order-of-magnitude lower cost-of-ownership provide decisive advantages. The review concludes by projecting potential trajectory of NIL through 2028, identifying template ecosystem maturation, artificial intelligence-driven process optimization, and hybrid mix-and-match lithography strategies as critical factor for adoption.